The present invention relates to method and apparatus for converting a run length limited (RLL) code for converting m-bit data words to n-bit code words while constraining the minimum number of continuous bits having the same binary value to d and the maximum number of continuous bits having the same binary value to k in a bit sequence generated by concatenation of the code words.
The RLL code is usually used in recording digital data at a high record density on a magnetic tape or a magnetic disk.
The RLL code is defined as the code in which a minimum number of continuous bits having the same binary value is constrained to d and the maximum number of continuous bits having the same binary value is constrained to k. The RLL code having such a property is generated by converting m-bit data words (each having a bit length of T) to n-bit code words, where n is larger than m.
In such an RLL code, the interval T.sub.w required to identify one bit (hereinafter referred to as a detection window) is m/nT and the minimum interval between transitions T.sub.min is d.multidot.T.sub.w.
In a recording and reproducing system, intersymbol interference usually occurs because high frequency components are cut off. In order to minimize the intersymbol interference, it is desirable for T.sub.min to be long. In order to suppress an influence by a time-axis variation such as a peak shift and jitter due to the intersymbol interference, it is desirable for the detection window T.sub.w to be long. In addition, in order to attain a self-clocking function, it is desirable for the maximum number of continuous bits k to be small.
In view of the above, various RLL codes have been developed such the 8/10 conversion code (ref. No. 1), the 8/9 conversion code (ref. No. 2), the 8/16 conversion code (ref. No. 3), the 2/3 conversion code (ref. No. 4), the 3PM code (ref. No. 5), the HDM-3 code (ref. No. 6) and the (2, 7) RLLC code (ref. No. 7). These references are identified below.
The 8/10 conversion code is an RLL code in which d=1, k=10, m=8, n=10, T.sub.w =0.8T and T.sub.min =0.8T in accordance with the above definitions.
The 8/9 conversion code is an RLL code in which d=1, k=14, m=8, n=9, T.sub.w =8/9T and T.sub.min =8/9T.
The 8/16 conversion code is an RLL code in which d=2, k=6, m=8, n=16, T.sub.w =0.5T and T.sub.min =T.
Those three RLL codes are DC free codes which do not include a D.C. component and in which T.sub.w has a larger weight than T.sub.min.
Since those RLL codes were developed primarily for a digital VTR in which low frequency components are cut off by a rotary transformer, they are DC free in nature and have a large T.sub.w because of a requirement for an extremely high recording density. On the other hand, those RLL codes have a large k.
The DC free code is defined as a code in which the difference between the number of "1"s and the number of "0"s included between any two bits in a bit sequence generated by concatenation of code words is definite. Digital Sum Variation (DSV) is referred to as the variation in the running sum of a bit sequence after conversion and the difference between the number of "1"s and the number of "0"s in the code word is referred to as disparity (DP).
On the other hand, the 2/3 conversion code is a variable length RLL code (ref. No. 7) in which d=2, k=8, m=2, n=3, T.sub.w =2/3T, and T.sub.min =4/3T in accordance with the above definitions.
The 3PM code is an RLL code in which d=3, k=12, m=3, n=6, T.sub.w =0.5T and T.sub.min =1.5T.
The HDM-3 code is an RLL code in which d=6, k=25, m=4, n=12, T.sub.w =T/3 and T.sub.min =2T.
The (2, 7) RLLC code is a variable length RLL code in which d=3, k=8, m=1, n=2, T.sub.w =T/3 and T.sub.min =2T.
A theoretical constraint of T.sub.w for any given d and k is known (except for the DC free code). The theoretical constraints T.sub.w * (ref. No. 8) for the given d and k in the 2/3 conversion code, 3PM code, HDM-3 code and (2, 7) RLLC code are shown below. ##EQU1##
This means that an RLL code having a higher performance exists. For example, k may be reduced while T.sub.w is kept unchanged or T.sub.w may be increased while k is reduced.
However, in the past, there has been no systematic coding rule to satisfying optional values of the d, k-constraint and the coding rule has been determined on a trial and repeat basis. Accordingly, it has been very difficult to generate an RLL code having a closer performance to the theoretical constraint.
The above reference Nos. 1 to 8 are as follows.
No. 1. Japanese Patent Laid-open specification No. 54-158135 "Digital Prossessor System". PA1 No. 2. Japanese Patent Laid-open specification No. 57-176866 "Binary Signal Encoder". PA1 No. 3. M. Artigaras, "8/16 A New Channel Coding for Digital VTR", 12th International Television Symposium and Technical Exhibition, Program of Equipment Innovations Sections, P261, 1981. PA1 No. 4. T. Horiguchi, et. al, "An Optimization of Modulation Codes in Digital Recording", IEEE Trans. MAG., Vol. 12, No. 6, November 1976. PA1 No. 5. G. V. Jacoby, "A New Look Ahead Code for Increased Data Density", IEEE Trans. MAG., Vol. 13, No. 5, PP. 1202-1204, September 1977. PA1 No. 6. Japanese Patent Laid-open specification No. 55-141852 "Data Conversion System". PA1 No. 7. P. A. Franaszek, "RUN-LENGTH-LIMITED VARIABLE LENGTH CODING WITH ERROR PROPAGATION LIMITATION", U.S. Pat. No. 3,689,899, September 1972. PA1 No. 8. D. T. Tang and L. R. Bahl, Information & Control. 17, No. 5, P. 436, 1970.